F L

FENG LIN

Senior design Engineer at Xilinx at Xilinx
Singapore,Singapore,Singapore

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Executive Summary

Feng Lin is an experienced analog/digital design engineer with 8 years of experience. He has strong transistor level circuits understanding and is skilled in CAD tools such as Cadence/synopsys debugging and ICM usage. Feng Lin is familiar with Lab equipment oscilloscope, advanced test, network analyzer, hotspot, wire bonding, and basic Perl skills. He has worked at Xilinx and Panasonic USA in various engineering and design roles. Feng Lin is based in Singapore and has a strong understanding of semiconductors and CAD tools.

Contact Information

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Current Workspace

Xilinx

Current

Design Engineer&Senior Design Engineer

Design Engineer

2011-02-01 -

Senior Design Engineer

2011-02-01 -

Professional Background

Personal Interests

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